1. Field of the Invention
The present invention relates generally to analog-to-digital converters and more particularly to multiple analog-to-digital converters integrated on a monolithic integrated circuit.
2. Discussion of the Related Art
In conventional single slope methods of analog-to-digital conversion, a clocked comparator is employed to compare a sampled and held signal with an analog ramp. The clocked comparator in turn generates a signal that is used to clock a latch circuit that stores the state of a digital counter when the sampled and held signal is equal to the analog ramp. The stored counter value is a digital representation of the magnitude of the analog signal. Integrated circuit applications of this type of circuit provide an array of such circuits.
Conventional single slope analog-to-digital converters encounter resolution and speed limitations due to limitations on maximum clock rate. One limit to the maximum clock rate with the convention single slope converter is due to metastability. Metastability is defined as the instability of a flip-flop when the clock and data inputs change simultaneously. Although the output of a flip-flop cannot, in principle, be guaranteed to have settled to a valid logic state after any given period of time, the probability that the output has not settled decreases exponentially with time. After about 69 time constants, for example, the probability of the output not settling is less than 10.sup.-30, which is acceptable for most applications.
Due to this problem, the clock rate must be reduced substantially to allow the flip-flop, which synchronizes the comparator output to the system clock time, to recover from metastability. Conventional devices require the metastability resolution to be done at a frequency determined by the time resolution of the conversion. As a result, conventional devices are limited to clock rates much less than their circuits are capable of.
The invention improves on conventional devices by removing the requirement to synchronize individual converters to the master clock and by generating a higher resolution digital code. It is therefore one object of the invention to provide an analog-to-digital converter that realizes a significant improvement in resolution and speed compared to conventional converters.